Based on industry-standard data protocols and the existing Teseda Workbench and Diagnostic Manager products, Scan Workbench will allow test engineers to better perform rapid silicon debug, design validation, failure analysis and yield monitoring resulting in decreased time-to-market and improved profitability, claims Teradyne.
Scan Workbench will provide debug and optimization environment based on IEEE 1450.0-1999 Standard Test Interface Language and the new STDF V4-2007 datalog standards. The software will initially be deployed on the Teradyne FLEX and J750 platforms which will provide Scan Workbench with access to an installed base of over 5,000 testers. The new toolset will be shipping in the second half of 2010.
Armagan Akar, president and CEO of Teseda, said: "The partnership allows us to work with the industry leader in ATE to offer our next-generation scan diagnostic tools to the largest potential market, the FLEX family and J750 installed base. In this ultra-competitive market, we concur with Teradyne's unique approach to support EDA- and ATE-agnostic tools in the marketplace."
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