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Designed for general purpose I/O expansion, interface bridging and power-up management functions, the instant-on, easy-to-use MachXO programmable logic device (PLD) family offers customers an "All-in-One-PLD" by providing distributed and embedded memory, built-in PLLs, high performance LVDS I/O, remote field upgrade (Lattice's TransFR(TM) technology) and a low power sleep mode, all in a single device.
"We use MachXO PLDs in our digital video recorder platform as they provide us with design flexibility and time-to-market advantages over other competitive ASIC and ASSP solutions," said Henry Zhang, chief technology officer at Zhejiang Dahua Technology. "The MachXO Control Development Kit and new reference designs will enable us to test a wide range of control-based functions in our designs and accelerate our time-to-market."
"Designers need a comprehensive set of development tools to implement their system control designs quickly and efficiently," said Gordon Hands, Director of Marketing for Low Density and Mixed Signal Solutions. "The new MachXO Control Development Kit and associated suite of reference designs provide designers with a complete and flexible platform that addresses board management functions typically implemented in system control applications."
The MachXO Control Development Kit
The MachXO Control Development Kit features the MachXO LCMXO2280 device, 2Mb SPI Flash and 1Mb SRAM memory, a current and temperature sensor, a Power Manager II ispPAC(R)-POWR1014A device, an expansion header for I2C, SPI, SD and compact Flash interfaces, several LEDs and user switches. Using the preloaded system-on-chip (SoC) design provided with the development kit, designers can now test within minutes typical board control functions including fan speed control based on temperature monitoring, LCD control, comprehensive power supply monitoring and reset distribution in conjunction with the Power Manager II POWR1014A and 8-bit LatticeMico8(TM) microcontroller. Designers can then build their own designs using the free downloadable reference design source code, implementing these features in less than an hour. Additional stand alone demos, including SD and Compact Flash memory / audio, fault logging, JTAG BSCAN and TransFR technology, can also be downloaded from the Lattice website and implemented on the control evaluation board.
The MachXO Control Development Kit includes a USB cable for device programming, AC adaptor (international plugs) and QuickSTART documentation. The associated reference designs and free ispLEVER(R) Starter design software can be downloaded from the Lattice website, www.latticesemi.com.
Pricing and Availability
Promotional pricing for the MachXO Control Development Kit is $119 and is good for kits ordered via the Lattice online store at http://www.latticesemi.com/store/dev_kits.cfm and through select authorized Lattice distributors through November 30, 2009. More information regarding the MachXO Control Development Kit is available at www.latticesemi.com/machxo-control-kit. More information regarding the new reference designs is available at www.latticesemi.com/products/intellectualproperty/referencedesigns.
All MachXO PLDs are fully production qualified and have been shipping for four years. MachXO PLDs feature a broad range of densities, packages and speed grade options and are available for ordering via the Lattice online store at www.latticesemi.com/store and through authorized Lattice distributors at www.latticesemi.com/sales. For more information about the Lattice MachXO PLD family, visit www.latticesemi.com/products/cpldspld/machxo. The free ispLEVER Starter software can be downloaded from the Lattice website at www.latticesemi.com/products/designsoftware/isplever/ispleverstarter
About Lattice Semiconductor
Lattice is the source for innovative FPGA, PLD, programmable Power Management and Clock Management solutions. For more information, visit www.latticesemi.com.
Lattice Semiconductor Corporation, Lattice (& design), L (& design), MachXO, TransFR ispPAC, LatticeMico8, ispLEVER and specific product designations are either registered trademarks or trademarks of Lattice Semiconductor Corporation or its subsidiaries in the United States and/or other countries.
GENERAL NOTICE: Other product names used in this publication are for identification purposes only and may be trademarks of their respective holders.
EDITORIAL/READER CONTACT: Brian Kiernan Corporate Communications Manager Lattice Semiconductor Corporation 503-268-8739 voice 503-268-8193 fax brian.kiernan@latticesemi.com
SOURCE: Lattice Semiconductor Corporation
mailto:brian.kiernan@latticesemi.com
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