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What:
Mixed-Signal IC Design Summit
When:
Oct. 27, 2009, 8:45 a.m. to 6 p.m.
Where:
Cadence Design Systems, Inc., 2655 Seely Ave., San Jose, Calif. 95134
Building 10 R&D Auditorium
Press Registration:
Contact Niki Tran at nikitran@cadence.com or (408) 428-5159
As a leader in mixed-signal design, Cadence recognizes the mission-critical
urgency and growing significance of mixed-signal design in the development
of today's complex, large-scale semiconductor designs.
Engineers and executives from Cadence Design Systems, Inc. and leading
semiconductor firms are meeting in an open forum to discuss the challenges
of mixed-signal design methodologies.
Attendees are invited to hear a keynote by Paul Emerson of Texas
Instruments, listen to fellow designers discuss methodologies they followed
to tackle mixed-signal design obstacles, watch live technical product
demonstrations, and ask questions in an informal setting.
Agenda*:
8:45 am Registration and breakfast
9:25 am Introduction: Steve Carlson, Cadence Design Systems, Inc.
9:30 am Welcome Address: John Bruggeman, Cadence Design Systems, Inc.
9:45 am Keynote: Paul Emerson, Texas Instruments
10:15 am Sigma Delta Converter Design Using Behavioral Modeling:
Yuval Shay, STMicroelectronics
10:45 am Break
11:00 am Verification of ESD Protection at Signal Domain Crossings:
Michael Khazhinsky, Freescale
11:30 am Solution Demonstration: Verifying mixed-signal designs using
analog design environment
12:30 pm Lunch with Cadence R&D team
1:15 pm Cadence Mixed-Signal Solution Overview: Mladen Nizic,
Cadence Design Systems, Inc.
1:45 pm AMS Verification for RF Design: Jess Chen, QUALCOMM
2:15 pm Full Chip Spice Simulation Methodology for Zero Defect Silicon:
Kumar Abhishek, Freescale
2:45 pm Break
3:00 pm Knowing Your Design Is Right: Robert Milkovits,
Jazz Semiconductor (a Tower Group Company)
3:30 pm Mixed-Signal Verification: Prashanth Aprameyan, Micron
4:00 pm Solution Demonstration: AMS IP design and SoC integration using
Virtuoso-Encounter Mixed-Signal Solution
5:00 pm Q&A Panel Moderated by Richard Goering, Cadence Design
Systems, Inc.
5:30 pm Closing Statements, Raffle Giveaway, Networking Event
*Subject to change
Those interested in attending are invited to register for the Summit at http://www.secure-register.net/cadence/ms_summit
For more information, please contact: Niki Tran Cadence Design systems, Inc. nikitran@cadence.com 408-428-5159
SOURCE: Cadence Design Systems, Inc.
mailto:nikitran@cadence.com
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